Hi, I'm Kenneth.
I'm a software engineer at Siemens EDA. I write software that maps large chip designs onto FPGAs so teams can test them before manufacturing. I use AI in my development work, write agent skills, and connect development tools through MCP.
FPGA prototyping
I work on the compiler for FPGA prototyping, which maps a chip design across multiple FPGAs. I write placement and partitioning algorithms for the compiler that distributes a chip's netlist across multiple FPGAs.
I've recently started working on netlist qualification, including clock handling.
I redesigned circuit replication to run over 4× faster on production designs, and optimized graph pruning with speedups of up to 60× on large circuits.
Siemens' overview of Veloce proFPGA CS explains the prototyping platform.
AI-assisted development
I document our codebase and engineering practices in agent skills, and connect development tools through MCP servers.
k_eff
I'm developing k_eff, an independent software studio focused on scientific computing and engineering tools.
Visit k_eff or see all my projects.
Experience
Before Siemens, I built simulation software at CEA during my PhD in Applied Mathematics at École polytechnique.
I grew up in Benin and now live in Sceaux, France.
- 2023 - now
- Siemens EDAFPGA prototyping · Placement & partitioning · C++
- 2020 - 2023
- CEA / École polytechniqueSimulation software · C++ · MPI & OpenMP · PhD
- 2020
- TotalWave propagation simulation and Python tooling
Publications
From my research at CEA.
- The Pn form of the Neutron Transport Problem Achieves Linear Scalability Through Domain DecompositionAccepted · 2023
- Spherical Harmonics and Discontinuous Galerkin Finite Element Methods for the Three Dimensional Neutron Transport Equation: Application to Core and Lattice CalculationNuclear Science and Engineering · 2023
- Precise 3D Reactor Core Calculation Using Spherical Harmonics and Discontinuous Galerkin Finite Element MethodsProceedings of International Conference on Physics of Reactors (PHYSOR) · 2022